In an effort to reduce the variation in copper plating thickness on printed circuit boards, a fractional factorial design was used to study the effect of three factors—anode height (up or down), circuit board orientation (in or out), and anode placement (spread or tight)—on plating thickness (“Characterization of Copper Plating Process for Ceramic Substrates,” Quality Engr., 1990: 269–284). The following factor combinations were run:
a. Find k and p for this 2kp design.
b. Determine the alias structure of this design.
c. Calculate estimates of the effects for this experiment.
d. Assuming that the AB interaction is negligible, use this information to obtain an estimate of SSE and perform hypothesis tests for both main effects. (Use .05.)
e. From the results in part (d), which factors have a significant effect on plating thickness variation?
f. If the objective of the study is to minimize the variation in plating thickness, what setting of each factor do you recommend?